Accessing the 5G PHY on the CN9K dev board

OCTEON CN9130
1

Hello!

I’m using the Octeon CN9132 COM Exp7 SolidRun module, with the CN9K dev board. I have previously gained access to the 1G management port (eth1), and I see no blockers setting up SFP+ port (eth0) and the 1Gx4 Marvell PHY interface (eth2).

I’ve looked through the Linux patches applied in your cn913x_build github repo, but I don’t understand which section refers to the 2x 5G Marvell PHY interfaces in the device tree changes. Can you direct me on this? I only see eth0, eth1 and eth2 when I run ip link show on the system, neither of which seem to refer to the 5G PHYs.

2

I should add that I haven’t built u-boot with the scripts since we are still waiting to get access to the Marvell SDK referred to in the documentation. I am using the pre-built u-boot.bin from the repo, if this makes a difference.