# SFP+ port mapping to dpmac.X

**URL:** <https://community.solid-run.com/t/sfp-port-mapping-to-dpmac-x/360>\
**Category:** NXP LX2160\
**Created:** [June 20, 2022, 2:24pm UTC](https://community.solid-run.com/t/sfp-port-mapping-to-dpmac-x/360 "2022-06-20T14:24:36Z")\
**Posts on this page:** 2\
**Page:** 1

<div class="post-metadata">

**Author:** ![joes](https://avatars.discourse-cdn.com/v4/letter/j/7ba0ec/32.png) [@joes](https://community.solid-run.com/u/joes)\
**Post date:** [June 20, 2022, 2:24pm UTC](https://community.solid-run.com/t/sfp-port-mapping-to-dpmac-x/360/1 "2022-06-20T14:24:36Z")

</div>

The documentation states: “dpmac.9 is the SFP+ port on the upper row and left towards PCB edge”. And, I can see that this works. However, I’m unable to find additional documentation that shows how the other ports are mapped. Could you please let me know the physical location of dpmac.7,dpmac.8 and dpmac.10?

Thanks.

---

<div class="post-metadata">

**Author:** ![womble](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/womble/32/114_2.png) [@womble](https://community.solid-run.com/u/womble)\
**Post date:** [June 21, 2022, 1:18pm UTC](https://community.solid-run.com/t/sfp-port-mapping-to-dpmac-x/360/2 "2022-06-21T13:18:44Z")

</div>

I think this is the order, as viewed from the rear of the cages.

```auto
+---+---+
| 9 | 7 |
+---+---+
|10 | 8 |
+---+---+

```