# Schematics for rev 1.3

**URL:** <https://community.solid-run.com/t/schematics-for-rev-1-3/47>\
**Category:** NXP LX2160\
**Tags:** NXP-LX2160\
**Created:** [May 10, 2021, 12:25pm UTC](https://community.solid-run.com/t/schematics-for-rev-1-3/47 "2021-05-10T12:25:56Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![AmeliaHarwood](https://avatars.discourse-cdn.com/v4/letter/a/7c8e57/32.png) [@AmeliaHarwood](https://community.solid-run.com/u/AmeliaHarwood)\
**Post date:** [May 10, 2021, 12:25pm UTC](https://community.solid-run.com/t/schematics-for-rev-1-3/47/1 "2021-05-10T12:25:56Z")

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Hi,  
I was wondering Why does the schematics for rev 1.3 have a DS250DF410 on the serdes lines but the 1.2 doesnt?

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**Author:** ![YazanShhadySR](https://avatars.discourse-cdn.com/v4/letter/y/a6a055/32.png) [@YazanShhadySR](https://community.solid-run.com/u/YazanShhadySR)\
**Post date:** [May 16, 2021, 7:08am UTC](https://community.solid-run.com/t/schematics-for-rev-1-3/47/2 "2021-05-16T07:08:24Z")

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Hi,

The schematic of rev 1.3 is relevant for ClearFog CX (that support 100 GB QSFP),  
and the schematic of rev 1.2 relevant for HoneyComb (the HoneyComb don’t have QSFP)

lanes 0…3 are routed to the **QSFP28** connector via TI retimers in the middle;

and lanes 4…7 are directly connected to the 4xSFP+ ports.

Note: The main different between rev1.3 & rev1.2 is relevant only for ClearFog CX to support 100G x QSFP (in rev 1.2 - the clearFog CX support 40G x QSFP)

Best Regards,  
Yazan.