# No PCIe devices

**URL:** <https://community.solid-run.com/t/no-pcie-devices/865>\
**Category:** NXP LX2160\
**Tags:** NXP-LX2160\
**Created:** [July 18, 2024, 6:31pm UTC](https://community.solid-run.com/t/no-pcie-devices/865 "2024-07-18T18:31:20Z")\
**Posts on this page:** 13\
**Page:** 1

<div class="post-metadata">

**Author:** ![Morta](https://avatars.discourse-cdn.com/v4/letter/m/f05b48/32.png) [@Morta](https://community.solid-run.com/u/Morta)\
**Post date:** [July 18, 2024, 6:31pm UTC](https://community.solid-run.com/t/no-pcie-devices/865/1 "2024-07-18T18:31:20Z")

</div>

Configuration

> **[5G RedCap module FG132 MiniPCIe - Fibocom-4G LTE/5G Wireless Cellular IoT...](https://www.fibocom.com/en/products/5GRedCap-FG132-MiniPCIe.html)**
>
> Fibocom FG132 is a 5G RedCap module packaged in MiniPCIe form factor. Empowered by SDX35 chipset platform.-Discover Fibocom's wireless cellular IoT module portfolio.-Fibocom is a global leading provider of wireless communication modules and...

[https://www.eetgroup.com/en-ie/mt-512t-coreparts-512gb-msata-ssd-wid-w124665726](https://www.eetgroup.com/en-ie/mt-512t-coreparts-512gb-msata-ssd-wid-w124665726)

 ![ima_df3206c](https://europe1.discourse-cdn.com/flex005/uploads/solid_run/original/1X/a6c11f49b9a148d7b21b811598188537a94d3ded.jpeg)

```auto
SERDES:=LX2162A_CLEARFOG_18_9_0

```

```auto
root@LX2162a:~# dmesg | grep -i pci
[0.000000] Kernel command line: console=ttyAMA0,115200 earlycon=pl011,mmio32,0x21c0000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf root=PARTUUID=30303030-01 rw rootwait
[0.060502] PCI/MSI: /interrupt-controller@6000000/gic-its@6020000 domain created
[2.472977] PCI: CLS 0 bytes, default 64
[3.175941] ehci-pci: EHCI PCI platform driver
[3.200102] ohci-pci: OHCI PCI platform driver

```

lspci gives no output

```auto

root@LX2162a:~# modprobe pci
modprobe: FATAL: Module pci not found in directory /lib/modules/5.10.35-00078-g160e2cf1f99

```

```auto
root@LX2162a:~# lsusb
Bus 002 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 001 Device 003: ID 2cb7:0112 Fibocom Fibocom Module
Bus 001 Device 002: ID 0424:2514 Microchip Technology, Inc. (formerly SMSC) USB 2.0 Hub
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub

```

Why it doesn’t work?

---

<div class="post-metadata">

**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [July 19, 2024, 5:40am UTC](https://community.solid-run.com/t/no-pcie-devices/865/2 "2024-07-19T05:40:08Z")

</div>

What BSP / Image are you using? Also please provide the full output of dmesg and lspci -vv

Thanks

---

<div class="post-metadata">

**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [July 19, 2024, 5:44am UTC](https://community.solid-run.com/t/no-pcie-devices/865/3 "2024-07-19T05:44:25Z")

</div>

Also could you please clarify something? The cellular card you linked to is a mini-pcie device but uses a USB interface and your lsusb output shows it is detected on the bus. It is possible that the 5.10 kernel does not have the drivers specific to the device.

What is the msata link you also included?

---

<div class="post-metadata">

**Author:** ![Morta](https://avatars.discourse-cdn.com/v4/letter/m/f05b48/32.png) [@Morta](https://community.solid-run.com/u/Morta)\
**Post date:** [July 19, 2024, 6:50am UTC](https://community.solid-run.com/t/no-pcie-devices/865/4 "2024-07-19T06:50:44Z")

</div>

I use image Ubuntu 22.04 builded with Docker and SERDES:=LX2162A\_CLEARFOG\_18\_9\_0

[https://github.com/SolidRun/lx2160a\_build/tree/master](https://github.com/SolidRun/lx2160a_build/tree/master)

As mSATA drive coreparts 512GB mt-512t

[https://www.eetgroup.com/en-ie/mt-512t-coreparts-512gb-msata-ssd-wid-w124665726](https://www.eetgroup.com/en-ie/mt-512t-coreparts-512gb-msata-ssd-wid-w124665726)

 ![Screenshot_2024-07-19_09.03.37](https://europe1.discourse-cdn.com/flex005/uploads/solid_run/original/1X/f7d7c2c8177038d9304b4ad81be0c0a523a287a3.png)

lspci -vv

```auto
 is blank

```

dmesg

[https://0x0.st/X9vG.txt](https://0x0.st/X9vG.txt)

uname -a

`Linux LX2162a 5.10.35-00078-g160e2cf1f99 #3 SMP PREEMPT Thu Jul 4 18:03:17 UTC 2024 aarch64 aarch64 aarch64 GNU/Linux`

Which protocol version of PCIe is supported and how many lanes?

---

<div class="post-metadata">

**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [July 22, 2024, 6:30am UTC](https://community.solid-run.com/t/no-pcie-devices/865/5 "2024-07-22T06:30:32Z")

</div>

Our default board configuration exposes all of the SERDES lanes as network interfaces. 8x 1Gbps, 2x10Gbps, and 2x25Gbps. The mPCIe slots only support USB wifi and wwan cards. If a device is assembled to support PCIe on the mPCIe slots of our carrier then it will be 1 lane of Gen3. The SOC and the SOM which a custom carrier can provide up to 12 lanes of PCIe Gen3.

---

<div class="post-metadata">

**Author:** ![Morta](https://avatars.discourse-cdn.com/v4/letter/m/f05b48/32.png) [@Morta](https://community.solid-run.com/u/Morta)\
**Post date:** [August 15, 2024, 8:20am UTC](https://community.solid-run.com/t/no-pcie-devices/865/6 "2024-08-15T08:20:16Z")

</div>

How I can test if the second mPCIe slot is working?

And is there other possibilities to plug a NVMe or SSD?

---

<div class="post-metadata">

**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [August 16, 2024, 7:53am UTC](https://community.solid-run.com/t/no-pcie-devices/865/7 "2024-08-16T07:53:20Z")

</div>

The default production of the lx2-lite carrier is only providing USB to the 2 mini-pcie slots. There is an assembly option to populate those as PCIe, but that is not the default configuration we sell. All the SERDES ports are dedicated to the networking ports.

This carrier does not include support for additional storage, beyond uSDHC, eMMC, or external USB3.

---

<div class="post-metadata">

**Author:** ![Morta](https://avatars.discourse-cdn.com/v4/letter/m/f05b48/32.png) [@Morta](https://community.solid-run.com/u/Morta)\
**Post date:** [August 16, 2024, 8:13am UTC](https://community.solid-run.com/t/no-pcie-devices/865/8 "2024-08-16T08:13:17Z")

</div>

Ok thanks for the explanation

When a build an image with docker where is this assembly option in the script to build it? Could you clarify?

Or which SERDES option have I to choose to have 2xSFP28 2x SFP+ and 8x1 Gbps NIC with PCIe support to both slots.

---

<div class="post-metadata">

**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [August 16, 2024, 8:14am UTC](https://community.solid-run.com/t/no-pcie-devices/865/9 "2024-08-16T08:14:58Z")

</div>

The assembly option is a manufacturing configuration for the board itself. It is not a software configuration option. Your board can only support USB devices in the 2 mini-pcie slots.

---

<div class="post-metadata">

**Author:** ![Morta](https://avatars.discourse-cdn.com/v4/letter/m/f05b48/32.png) [@Morta](https://community.solid-run.com/u/Morta)\
**Post date:** [August 20, 2024, 7:17pm UTC](https://community.solid-run.com/t/no-pcie-devices/865/10 "2024-08-20T19:17:16Z")

</div>

```auto
LX2162A_CLEARFOG_0_0_*)
		DPC=LX2162-USOM/clearfog-s1_0-s2_0-dpc.dtb
		DPL=LX2162-USOM/clearfog-s1_0-s2_0-dpl.dtb
		DEFAULT_FDT_FILE="fsl-lx2162a-clearfog.dtb"

```

```auto
LX2162A_CLEARFOG_3_7_*)
		DPC=LX2162-USOM/clearfog-s1_3-s2_7-dpc.dtb
		DPL=LX2162-USOM/clearfog-s1_3-s2_7-dpl.dtb
		DEFAULT_FDT_FILE="fsl-lx2162a-clearfog.dtb"

```

```auto
LX2162A_CLEARFOG_3_9_*)
		DPC=LX2162-USOM/clearfog-s1_3-s2_9-dpc.dtb
		DPL=LX2162-USOM/clearfog-s1_3-s2_9-dpl.dtb
		DEFAULT_FDT_FILE="fsl-lx2162a-clearfog.dtb"

```

```auto
LX2162A_CLEARFOG_3_11_*)
		DPC=LX2162-USOM/clearfog-s1_3-s2_7-dpc.dtb
		DPL=LX2162-USOM/clearfog-s1_3-s2_7-dpl.dtb
		DEFAULT_FDT_FILE="fsl-lx2162a-clearfog.dtb"

```

```auto
LX2162A_CLEARFOG_18_9_*)
		DPC=LX2162-USOM/clearfog-s1_3-s2_9-dpc.dtb
		DPL=LX2162-USOM/clearfog-s1_3-s2_9-dpl.dtb
		DEFAULT_FDT_FILE="fsl-lx2162a-clearfog.dtb"

```

Where can I see what the difference is of these SERDES configuration and which impact they have?

---

<div class="post-metadata">

**Author:** ![Morta](https://avatars.discourse-cdn.com/v4/letter/m/f05b48/32.png) [@Morta](https://community.solid-run.com/u/Morta)\
**Post date:** [August 20, 2024, 7:36pm UTC](https://community.solid-run.com/t/no-pcie-devices/865/11 "2024-08-20T19:36:12Z")

</div>

![serdes_1](https://europe1.discourse-cdn.com/flex005/uploads/solid_run/original/1X/9c43b7a21c368a854759ed3fb82ed59a3d1465f3.png)  
 ![Serdes_2](https://europe1.discourse-cdn.com/flex005/uploads/solid_run/original/1X/e9d7429056ecd814a11d28fe1cbd8280e583e555.jpeg)

---

<div class="post-metadata">

**Author:** ![Morta](https://avatars.discourse-cdn.com/v4/letter/m/f05b48/32.png) [@Morta](https://community.solid-run.com/u/Morta)\
**Post date:** [August 20, 2024, 7:45pm UTC](https://community.solid-run.com/t/no-pcie-devices/865/12 "2024-08-20T19:45:39Z")

</div>

When I want 2x25Gbps + 2x10Gbps + 8x1Gbps + 1x mPCIe which SERDES configuration should I choose?  
I believe 18\_9\_0 ?!

What is the difference between 3 and 18 on SERDES 1?  
It 3 = 4x10Gbps and 18 = 2x25Gbps & 2x10Gbps?

What is the difference between 7,9 and 11 on SERDES 2?

Should I not have optimally 18\_11 as SERDES? It’s doesn’t exists.

I chosen 18\_9\_0 as SERDES but the mPCIe Fibocom 5G Moduls works. 9 have no mPCIe SERDES.  
Why is working?

---

<div class="post-metadata">

**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [August 21, 2024, 8:24am UTC](https://community.solid-run.com/t/no-pcie-devices/865/13 "2024-08-21T08:24:58Z")

</div>

You can use our developer website documentation for the module, [https://solidrun.atlassian.net/wiki/spaces/developer/pages/197494140/LX2162A+SOM+Hardware+User+Manual#SERDES-configuration](https://solidrun.atlassian.net/wiki/spaces/developer/pages/197494140/LX2162A+SOM+Hardware+User+Manual#SERDES-configuration)

Or register for free on NXP’s site and download the hardware reference manual for the LX2162a
