# Modifying device tree to add new peripherals
**URL:** https://community.solid-run.com/t/modifying-device-tree-to-add-new-peripherals/798
**Category:** NXP i.MX8M Plus
**Tags:** iMX8M-plus
**Created:** [January 11, 2024, 6:42am UTC](https://community.solid-run.com/t/modifying-device-tree-to-add-new-peripherals/798 "2024-01-11T06:42:47Z")
**Posts on this page:** 2
**Page:** 1
### Author:  [@manoj](https://community.solid-run.com/u/manoj)
#### Post date: [January 11, 2024, 6:42am UTC](https://community.solid-run.com/t/modifying-device-tree-to-add-new-peripherals/798/1 "2024-01-11T06:42:47Z")
We are building a custom board using the Imx8mp processor and we are using the imx8mp hummingboard pulse as our eval kit.
We are using yocto kirkstone to build the image for the same.
As an example I’m looking at pinmux of the ecspi2 node in dts file of the imx8mp humming board pulse.
&iomuxc {
pinctrl-names = “default”;
pinctrl-0 = \<&pinctrl\_hog\>;
pinctrl\_ecspi2: ecspi2grp {
fsl,pins = \<
MX8MP\_IOMUXC\_ECSPI2\_SCLK\_\_ECSPI2\_SCLK 0x82
MX8MP\_IOMUXC\_ECSPI2\_MOSI\_\_ECSPI2\_MOSI 0x82
MX8MP\_IOMUXC\_ECSPI2\_MISO\_\_ECSPI2\_MISO 0x82\>;
};
pinctrl\_ecspi2\_cs: ecspi2cs {
fsl,pins = \;
};
How did These adresses arrive? 0x82 and 0x40000
Why do all the SCLK, MOSI, MISO have same adresses
Why do the adresses of the above 3 and CS look different?
I have also gone through the file dts/freescale/imx8mp-pinfunc.h for finsing these adresses, but to my surprise these adresses dont even match. Is there something I’m missing here.
Also, say i want to reconfigure one of the SAI pins as a GPIO and add the node in my dts, how can i get the adresses? How can i do it? Or more simply put how can i take any pin say SAI pin, or UART pin, or a simple GPIO pin from the processor, get the address from the pinmux, configure it as either an LED or a pushbutton?
Please provide us an elaborate answer as we are facing trouble regarding the same and we don’t have much support…Thanks in advance!
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### Author:  [@jnettlet](https://community.solid-run.com/u/jnettlet)
#### Post date: [January 11, 2024, 8:36am UTC](https://community.solid-run.com/t/modifying-device-tree-to-add-new-peripherals/798/2 "2024-01-11T08:36:16Z")
These are not addresses but the configuration of the PIN. You can download the iMX8MP Hardware Reference from NXP’s website for free, and that has all documentation to reference what setting these bits does for a specific pin mux configuration.
To change a pin, you need to use the GPIO mux definition for that pin. For example MX8MP\_IOMUXC\_ECSPI2\_MISO\_\_ECSPI2\_MISO would be MX8MP\_IOMUXC\_ECSPI2\_MISO\_\_GPIO5\_IO12 and then you need to configure that pin according to the reference manual, setting bits for pull up / down drive strength, hysteresis, open drain, etc.
Just remember you need to remove the old definition when you create a new pin definition or else there will be a collision in definitions.