# LX2162A RCW source config pins

**URL:** <https://community.solid-run.com/t/lx2162a-rcw-source-config-pins/448>\
**Category:** NXP LX2160\
**Created:** [August 26, 2022, 8:54am UTC](https://community.solid-run.com/t/lx2162a-rcw-source-config-pins/448 "2022-08-26T08:54:59Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![dstepanov](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/dstepanov/32/144_2.png) [@dstepanov](https://community.solid-run.com/u/dstepanov)\
**Post date:** [August 26, 2022, 8:54am UTC](https://community.solid-run.com/t/lx2162a-rcw-source-config-pins/448/1 "2022-08-26T08:54:59Z")

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I’m planning to use LX2162A SOM and trying to understand possible boot source options. Due to simplified schematics ([https://solidrun.atlassian.net/wiki/spaces/developer/pages/197494140/LX2162A+SOM+Hardware+User+Manual#Simplified-Schematics](https://solidrun.atlassian.net/wiki/spaces/developer/pages/197494140/LX2162A+SOM+Hardware+User+Manual#Simplified-Schematics)) all CFG\_RCW\_SRC[3:0] pins are tied to OVDD thus enabling boot from FlexSPI Serial NOR flash (4’b1111). CFG\_RCW\_SRC3 and CFG\_RCW\_SRC2 are connected to SOM interface connector - so i can control them from my own development board. But LX2162A Reference Manual (4.9.8.1 Selecting the RCW Source and “Flash Mode”) states that src3 is used to select hard-coded RCW options and it is not what i need. So i have only 2 possible options to select boot source using pin src2 - 4’b1111 and 4’b1011. But 4’b1011 value is reserved making src2 useless. So looks like i have no ability to choose boot source, only Serial NOR Flash could be used. Is it correct?

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<div class="post-metadata">

**Author:** ![dstepanov](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/dstepanov/32/144_2.png) [@dstepanov](https://community.solid-run.com/u/dstepanov)\
**Post date:** [August 29, 2022, 12:42pm UTC](https://community.solid-run.com/t/lx2162a-rcw-source-config-pins/448/2 "2022-08-29T12:42:40Z")

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My fault - haven’t noticed that CFG0/1 pins are multiplexed with UART1\_TXD/UART2\_TXD and are actually connected to external connector (although marked on schematics as corresponding UART pins).