# Clearfog Base CN9130 PCIe0 4 Lane configuration
**URL:** https://community.solid-run.com/t/clearfog-base-cn9130-pcie0-4-lane-configuration/279
**Category:** OCTEON CN9130
**Created:** [March 24, 2022, 4:57am UTC](https://community.solid-run.com/t/clearfog-base-cn9130-pcie0-4-lane-configuration/279 "2022-03-24T04:57:32Z")
**Posts on this page:** 3
**Page:** 1
### Author:  [@dixit](https://community.solid-run.com/u/dixit)
#### Post date: [March 24, 2022, 4:57am UTC](https://community.solid-run.com/t/clearfog-base-cn9130-pcie0-4-lane-configuration/279/1 "2022-03-24T04:57:32Z")
Hello,
I would like to configure the kernel to use PCIe0 as 4- Lane PCIe.
I have made the changes in the Device tree of Clearfog base which comes default in the software package. Below are the major changes;
/\* SRDS #3 - SGMII 1GE on carrier board _/
&cp0\_eth1 {
status = “disabled”;
}
/_ SRDS #2 - SFP+ 10GE \*/
&cp0\_eth0 {
status = “disabled”;
}
&cp0\_pcie0 {
status = “okay”;
num-lanes = \<4\>;
num-viewport = \<8\>;
/\* Generic PHY, providing serdes lanes \*/
phys = \<&cp0\_comphy0 0
&cp0\_comphy1 0
&cp0\_comphy2 0
&cp0\_comphy3 0\>;
iommu-map =
\<0x0 &smmu 0x480 0x20\>,
\<0x100 &smmu 0x4a0 0x20\>,
\<0x200 &smmu 0x4c0 0x20\>;
iommu-map-mask = \<0x031f\>;
};
With this changes, the board is not booting it’s stuck at PCI configuration section(from the bootlogs);
[1.421653] SMCCC: SOC\_ID: ARCH\_SOC\_ID not implemented, skipping …
[1.428442] usbcore: registered new interface driver usbhid
[1.434044] usbhid: USB HID core driver
[1.439815] mmc0: SDHCI controller on f06e0000.sdhci [f06e0000.sdhci] using ADMA 64-bit
[1.440630] NET: Registered PF\_PACKET protocol family
[1.453003] 9pnet: Installing 9P2000 support
[1.457315] Key type dns\_resolver registered
[1.461758] Loading compiled-in X.509 certificates
[1.468037] hw perfevents: enabled with armv8\_cortex\_a72 PMU driver, 7 counters available
[1.477403] gpio-59 (phy\_reset): hogged as output/high
[1.483494] armada8k-pcie f2600000.pcie: host bridge /cp0/pcie@f2600000 ranges:
[1.490882] armada8k-pcie f2600000.pcie: MEM 0x00c0000000…0x00dfefffff → 0x00c0000000
What would be the proper PCI configuration to make this work.
Thanks in advance,
---
### Author:  [@jnettlet](https://community.solid-run.com/u/jnettlet)
#### Post date: [March 24, 2022, 6:14am UTC](https://community.solid-run.com/t/clearfog-base-cn9130-pcie0-4-lane-configuration/279/5 "2022-03-24T06:14:31Z")
I am sorry I misread the title…hadn’t had my coffee yet. I was answering for the ClearFog CX, not the CN9130. disregard my other answers. For the ClearFog these are changed in the SERDES config in u-boot.
---
### Author:  [@dixit](https://community.solid-run.com/u/dixit)
#### Post date: [March 25, 2022, 11:55am UTC](https://community.solid-run.com/t/clearfog-base-cn9130-pcie0-4-lane-configuration/279/6 "2022-03-25T11:55:20Z")
Okay @jnettlet Can you provide any reference to configure PCIe0 as 4-lane PCIe on the Clearfog Base board?