# 40Gbps and 10Gbps

**URL:** <https://community.solid-run.com/t/40gbps-and-10gbps/506>\
**Category:** NXP LX2160\
**Created:** [October 27, 2022, 6:56pm UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506 "2022-10-27T18:56:50Z")\
**Posts on this page:** 8\
**Page:** 1

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**Author:** ![lx2160a\_newbie](https://avatars.discourse-cdn.com/v4/letter/l/9e8a1a/32.png) [@lx2160a\_newbie](https://community.solid-run.com/u/lx2160a_newbie)\
**Post date:** [October 27, 2022, 6:56pm UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/1 "2022-10-27T18:56:50Z")

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I’m looking to have a 40Gbps and a 10Gbps port on the SolidRun LX2160A ClearFog  
CX.

I found this reference manual [https://developer.solid-run.com/knowledge-base/lx2160a-cex7-user-manual/?\_gl=1_fm532x_\_gcl\_aw\*R0NMLjE2NjM2MDcxMTYuRUFJYUlRb2JDaE1Ja0lYa3RxdWgtZ0lWM3hYVUFSMDFoUURfRUFBWUFTQUFFZ0w4RV9EX0J3RQ…&\_ga=2.47443623.1223151252.1666814074-540084244.1663075607&\_gac=1.237627828.1663607124.EAIaIQobChMIkIXktquh-gIV3xXUAR01hQD\_EAAYASAAEgL8E\_D\_BwE#serdes-block-3-sd3-pllf-plls-100mhz-spread-spectrum-disabled](https://developer.solid-run.com/knowledge-base/lx2160a-cex7-user-manual/?_gl=1*fm532x*_gcl_aw*R0NMLjE2NjM2MDcxMTYuRUFJYUlRb2JDaE1Ja0lYa3RxdWgtZ0lWM3hYVUFSMDFoUURfRUFBWUFTQUFFZ0w4RV9EX0J3RQ..&_ga=2.47443623.1223151252.1666814074-540084244.1663075607&_gac=1.237627828.1663607124.EAIaIQobChMIkIXktquh-gIV3xXUAR01hQD_EAAYASAAEgL8E_D_BwE#serdes-block-3-sd3-pllf-plls-100mhz-spread-spectrum-disabled)

Unfortunately, it doesn’t seem to have this configuration.

Is this correct?

If so, I can accept having a 25Gbps and a 10Gbps port. It looks like this would require SERDES1 = 18. I tried setting this in runme.sh : ${SERDES:=18\_5\_2}

The script fails because it can’t find lx2160a\_SD1\_18.rcwi.

Would someone be able to provide me with this file? I found other SD1 rcwi files at build/rcw/lx2160acex7/configs/, but not one for SD1 = 18.

Thank you very much for your help.

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**Author:** ![lx2160a\_newbie](https://avatars.discourse-cdn.com/v4/letter/l/9e8a1a/32.png) [@lx2160a\_newbie](https://community.solid-run.com/u/lx2160a_newbie)\
**Post date:** [October 31, 2022, 3:29pm UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/2 "2022-10-31T15:29:44Z")

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Actually, I did find a protocol where there can be a 40G port and a 10G port (SD1=19), but according to the block diagram, it exposes the 40G port to the 4 x SFP+ devices, and the 10G port coming out of the QSFP device. I’d prefer the 40G port coming out of the QSFP device and the 10G port coming out one of the SFP+ devices. Unless the block diagram is wrong?

That’s why I am willing to settle on the SD1=18 protocol, as that exposes a 25G device from the QSFP port, and a 10G device from one of the SFP+ devices.

But the lx2160a\_build directory does not have an rcwi file for SD1=18 or SD1=19. Is there someone who could help me with this?

Thank you.

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**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [November 2, 2022, 7:38am UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/3 "2022-11-02T07:38:57Z")

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Yes our boards would require a custom pbl setup for this configuration. I am working on the documentation.

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<div class="post-metadata">

**Author:** ![lx2160a\_newbie](https://avatars.discourse-cdn.com/v4/letter/l/9e8a1a/32.png) [@lx2160a\_newbie](https://community.solid-run.com/u/lx2160a_newbie)\
**Post date:** [November 2, 2022, 12:22pm UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/4 "2022-11-02T12:22:26Z")

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Thank you jnettlet. I look forward to your solution to build a board image with SD1=18 and a separate board image with SD1=19.

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<div class="post-metadata">

**Author:** ![lx2160a\_newbie](https://avatars.discourse-cdn.com/v4/letter/l/9e8a1a/32.png) [@lx2160a\_newbie](https://community.solid-run.com/u/lx2160a_newbie)\
**Post date:** [November 8, 2022, 2:18pm UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/5 "2022-11-08T14:18:08Z")

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@jnettlet Would you have an update on the files needed to generate a board image for SD1 = 18 and for SD1 = 19?

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**Author:** ![jnettlet](https://dub1.discourse-cdn.com/flex005/user_avatar/community.solid-run.com/jnettlet/32/62_2.png) [@jnettlet](https://community.solid-run.com/u/jnettlet)\
**Post date:** [November 9, 2022, 2:56pm UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/6 "2022-11-09T14:56:50Z")

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I am working on getting this documented, with a couple other configurations.

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<div class="post-metadata">

**Author:** ![lx2160a\_newbie](https://avatars.discourse-cdn.com/v4/letter/l/9e8a1a/32.png) [@lx2160a\_newbie](https://community.solid-run.com/u/lx2160a_newbie)\
**Post date:** [November 9, 2022, 3:44pm UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/7 "2022-11-09T15:44:27Z")

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Thank you very much jnettlet!

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**Author:** ![AurelieG](https://avatars.discourse-cdn.com/v4/letter/a/e47c2d/32.png) [@AurelieG](https://community.solid-run.com/u/AurelieG)\
**Post date:** [January 16, 2023, 11:08am UTC](https://community.solid-run.com/t/40gbps-and-10gbps/506/8 "2023-01-16T11:08:00Z")

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Hello,

I am also looking to have a 40G port coming out of the QSFP device.

I tried to generate an image with SD1=19 but the rcwi file for this configuration is not available.  
Can you confirm that the SD1=19 is the right configuration to have a 40G on QSFP port ?

If it’s the right configuration: Is the documentation available for this configuration ? And the files ?

Thank you.
